Student Design Contest

Session Chair: Jung-Hoon Chun, Sungkyunkwan University
Session Co-chair: Sai-Weng Sin, University of Macau
Date: Nov. 07, 2022 (Monday)
Time: 14:00 – 17:40 (UTC+8)
Room: Sky Lounge 崑崙廳, 12F

ID Time Title / Authors / Affiliation
SDC1
(7224)
(On-site)
14:00
     |
17:40
A −50 to 130 °C, 38.69 pJ/conv Fully Integrated SAR Temperature Sensor Based on Direct Temperature-Voltage Comparison
Jooeun Kim, Jeongmyeong Kim, Changjoo Park, Minkyu Yang, and Wanyeong Jung
KAIST, South Korea
SDC2
(7112)
(On-site)
14:00
     |
17:40
A 91-dB DR 20-kHz BW 5th-Order Multi-Step Incremental ADC for Sensor Interfaces by Re-Using a MASH 2-1 Modulator
Jia-Sheng Huang1,2, Shih-Che Kuo1, Yu-Cheng Huang1, Chia-WeiKao1,2, Che-Wei Hsu1,3 and Chia-Hung Chen1
1National Yang Ming Chiao Tung University, Taiwan
2Now with Realtek, Taiwan
3Now with Mediatek, Taiwan
SDC3
(7209)
(On-line)
14:00
     |
17:40
A 0.3V 762nW-Only Binary-Search Phase ADC With Current-Reused RO-based Comparator
Sifan Wang1, Kejin Li1, Chi-Hang Chan1, Yan Zhu1, Rui Paulo Martins1,2
1University of Macau, China
2On leave Universidade de Lisboa, Portugal
SDC4
(7154)
(On-line)
14:00
     |
17:40
DSC-TRCP: Dynamically Self-calibrating Tunable Replica Critical Paths Timing Monitoring for Variation Resilient Circuits with Low Cost & Large Power/Frequency Gain
Zhengguo Shen, Weiwei Shan*, Yuxuan Du, Ziyu Li, Chengjun Wu, Jun Yang
Southeast University, China
SDC5
(7208)
(On-line)
14:00
     |
17:40
C3MLS: A 0.12-nW Leakage and 18.11-fJ/Transition Level Shifter With Cross-Coupled and Current Mirror Hybrid Structure for Ultra-Wide Range Level Conversions
Cong Huang and Hailong Jiao*
Peking University, China
SDC6
(7170)
(On-line)
14:00
     |
17:40
A 65nm 8-bit All-Digital Stochastic-Compute-In-Memory Deep Learning Processor
Jiyue Yang, Tianmu Li, Wojciech Romaszkan, Puneet Gupta, and Sudhakar Pamarti
University of California, Los Angeles, USA
SDC7
(7188)
(On-site)
14:00
     |
17:40
High-speed and energy-efficient crypto-processor for post-quantum cryptography CRYSTALS-Kyber
Taishin Shimada, Makoto Ikeda
The University of Tokyo, Japan
SDC8
(7023)
(On-site)
14:00
     |
17:40
A 110-120-GHz, 12.2% Efficiency, 16.2-dBm Output Power Multiplying Outphasing Transmitter in 22-nm FDSOI
Jeff Shih-Chieh Chien, James F. Buckwalter
University of California, Santa Barbara, USA
SDC9
(7214)
(On-site)
14:00
     |
17:40
A 37-39GHz Phase and Amplitude Detection Circuit with 0.060 degree and 0.043dB RMS Errors for the Calibration of 5GNR Phased-Array Beamforming
Yudai Yamazaki, Jun Sakamaki, Jian Pang, Joshua Alvin, Zheng Li, Atsushi Shirane, Kenichi Okada
Tokyo Institute of Technology, Japan
SDC10
(7051)
(On-site)
14:00
     |
17:40
A 103 fJ/b/dB, 10-26 Gbps Receiver with a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement
Yao-Chia Liu1, Wei-Zen Chen1, Yuan-Sheng Lee2, Yu-Hsiang Chen2, Shawn Min2, Ying-Hsi Lin2
1National Yang Ming Chiao Tung University, Taiwan
2Realtek Semiconductor Corp., Taiwan
SDC11
(7236)
(On-site)
14:00
     |
17:40
A 14V Hybrid Boost Converter With Scalable Conversion Ratio in 180nm Standard CMOS for an Ultrasound Imaging System
Jiaqi Guo1, Jiamin Li2, Jerald Yoo1,3
1National University of Singapore, Singapore
2Southern University of Science and Technology, China
3The N.1 Institute for Health, Singapore
SDC12
(7104)
(On-line)
14:00
     |
17:40
A 0.95pJ/b 5.12Gb/s/pin Charge-Recycling IOs with 47% Energy Reduction for Big Data Applications
Han Wu1, Jeong Hoan Park2, Miaolin Zhang1, Longyang Lin3, Rucheng Jiang1, Jung-Hwan Choi2, Jerald Yoo1,4
1National University of Singapore, Singapore
2Samsung Electronics, South Korea
3Southern University of Science and Technology, China
4The N.1 Institute for Health, Singapore
SDC13
(7217)
(On-site)
14:00
     |
17:40
A Real-Time High-Resolution Variable-Size Imaging Processor for Spaceborne Synthetic Aperture Radar
Jia-Zhao Lin1, Po-Ta Chen1, Hung-Yuan Chin1, Pei-Yun Tsai1, and Sz-Yuan Lee2
1National Central University, Taiwan
2National Applied Research Laboratory, Taiwan
SDC14
(7254)
(On-site)
14:00
     |
17:40
A 75.6M Base-pairs/s FPGA Accelerator for FM-index Based Paired-end Short-Read Mapping
Chung-Hsuan Yang1, Yi-Chung Wu1, Yen-Lung Chen1, Chao-Hsi Lee2, Jui-Hung Hung2,3, Chia-Hsiang Yang1,2
1National Taiwan University, Taiwan
2GeneASIC Technologies Corp., Taiwan
3National Yang Ming Chiao Tung University, Taiwan
SDC15
(7239)
(On-site)
14:00
     |
17:40
A 409.6 GOPS and 204.8 GFLOPS Mixed-Precision Vector Processor System for General-Purpose Machine Learning Acceleration
Jung-Hoon Kim, Sukjin Lee, Seungjae Moon, Sungyeob Yoo, and Joo-Young Kim
KAIST, Korea
SDC16
(7248)
(On-site)
14:00
     |
17:40
An Efficient Unsupervised Learning-based Monocular Depth Estimation Processor with Partial-Switchable Systolic Array Architecture in Edge Devices
Wonhoon Park, Dongseok Im, Hankyul Kwon, and Hoi-Jun Yoo
Korea Advanced Institute of Science and Technology, Korea